Switched-mode DC-DC converters are widely employed when it is necessary to convert a supply voltage to a lower or higher output value, the output value being closely regulated, while simultaneously maintaining high efficiency. A switched-mode DC-DC converter consists of one or more switching elements directing current from a supply, such as a battery, to a storage element such as an inductor or capacitor. An exemplary buck inductive converter, shown schematically in FIG. 1, uses two switches (series switch, shunt switch) and an inductor to convert an input voltage Vin to a lower-valued output voltage Vout. Note that a variety of other switched-mode converter topologies exist for varying applications, capable of both increasing (“boost”) and decreasing (“buck”) the input voltage. Furthermore, though N-type FET switch devices are indicated in FIG. 1, any appropriate switching means, including N- or P-type FETs or bipolar transistors, can be used.
The states of these switches (series switch, shunt switch) are controlled by voltage waveforms Vc,ser and Vc,sh, shown in simplified form in FIG. 2. Note that the waveforms of FIG. 2 are appropriate for N-type FET switches; one or both waveforms might be inverted and offset in voltage if P-type switches, or bipolar switches, are employed. The series switch is on (closed) for a time Ton, during which current flows from the voltage supply (a battery in the exemplary converter of FIG. 1) into the output storage inductor Lout. During this time the current flowing through the output storage inductor increases approximately linearly with time. During the time Toff, the series switch is turned off (opened). After a brief dead time, required to ensure that the two switches are not both on simultaneously, the shunt switch is turned on (closed). Current flows from ground into the output storage inductor. During this time, the current decreases approximately linearly with time; however, if the inductor is sufficiently large relative to the switching period, the current will not fall to 0. (This is known as continuous mode operation.) At the end of the period Toff, the series switch is turned on again. The sum of Ton and Toff is the switching period T. The switching frequency fsw=1/T. The duty cycle D is defined as the fraction of the switching period during which the series switch is on:
  D  =            T      on                      T        on            +              T        off            It may be shown that in steady-state continuous mode operation, if dead times and parasitic resistances can be neglected, the output voltage is proportional to the duty cycle:Vout=DVin Since the output voltage is controlled by adjusting the width of the control pulses to the switching elements, this type of control is known as pulse-width modulation or PWM.
For any given embodiment, there must in general exist a minimum value of Toff, typically no less than the slim of the minimum dead times and the shortest time the shunt switch can be turned on (which is limited by the finite rise and fall times of the shunt switch, not shown in the figure). In specific implementations, other aspects of circuit operation may impose more stringent constraints on duty cycle than the pulse width alone. Thus, the duty cycle D has an achievable maximum value for a fixed switching frequency fsw, corresponding (for a buck converter) to the maximum ratio of output voltage to input voltage. If the output voltage is substantially fixed, as is the case in many practical applications, the maximum value of D constrains the input voltage Vin to be higher than some minimum value. When the voltage source is a battery, this constraint is equivalent to a limit on the usable lifetime of the battery before it must be charged or replaced.
One prior-art solution to this problem is to change the switching period T (and thus the switching frequency fsw) to permit operation at higher duty cycles for the same minimum value of Toff, as shown in FIG. 3. The period during which the series switch is on is extended for the same minimum pulse width of the shunt switch and thus the same minimum value of Toff. The period increases from T to Tadj>T, and the switching frequency falls to fsw,adj<fsw. In practice, changes in frequency may be implemented by continuous changes in the duration of e.g. the on pulse, or by simply leaving one switch on continuously during some cycles, while switching it off in the normal (PWM) fashion in others. This latter technique is often referred to as “pulse skipping”. If every other pulse is skipped, the switching frequency is reduced by a factor of 2, and thus the maximum attainable duty cycle is increased by roughly the same amount.
An exactly analogous problem can also arise at very low ratios of output to input voltage, where the period during which the series switch is on, Ton, becomes comparable to the minimum achievable pulse. In this case, it is again possible to reduce the switching frequency by extending the time Toff, or by skipping individual cycles, or allowing bursts of cycles alternating with times during which the switches are off, in all cases reducing the duty cycle D below what would be achievable at a fixed frequency. It is also common to allow discontinuous mode operation in this low-power pulse-skipping or burst-mode condition.
An exemplary control flow for frequency reduction is shown in FIG. 4. An output voltage is compared (step 410) with a reference voltage to establish whether the requested duty cycle from the PWM controller requires adjustment. The resulting requested duty cycle (step 420) is tested to see if it exceeds the maximum duty cycle that can be provided by the particular converter in use. If the requested duty cycle D exceeds the achievable maximum (step 430), the switching frequency is reduced (step 440) until the requested value of D can be achieved. (An additional control provision, not shown here, will increase the switching frequency, including returning it to the nominal value, when the required duty cycle falls.) The PWM is adjusted to the requested D (step 450). It will be understood that this algorithm may be implemented digitally, or may characterize the operation of an analog control circuit, or may be a mixture of the two approaches.
An example of this behavior for a typical commercial switched-mode converter is shown in FIG. 5: if the converter is employed at high duty cycles, as the input voltage falls, the switching frequency falls to maintain a fixed output voltage. For a typical lithium-based battery, the range of voltages shown span the operating life of the battery, so it is expected that converter switching frequency will drift slowly downwards throughout the whole battery lifetime or discharge cycle.
Another approach to obtaining higher output voltages is to bypass the switching regulator altogether by providing a low-resistance switching element (typically a transistor) that directly connects the voltage supply and an output of the converter. In the so-called bypass mode, the low-resistance bypass transistor and the series switch of the buck converter are both turned full on (that is, the duty cycle of the switching regulator is fixed at 100%), in order to minimize resistance between the battery and the output. As a consequence, the output voltage is no longer regulated.
A fixed switching frequency and its harmonics are relatively simple to filter from electronic circuitry, but varying frequencies are more difficult to remove from neighboring circuits. In conventional switched-mode converters, operating at switching frequencies of a few MHz or less, variations in switching frequency are known to give rise to increased problems with electromagnetic interference (EMI), and may also cause interference at audio frequencies if the initial switching frequency is low. There are numerous advantages to the use of a much higher switching frequency, as large as 100 MHz or greater, including reductions in the size of the output capacitance and inductance required, and improved speed of response to changing load conditions. In a typical application of such a converter, the output voltage of the converter is connected to an output power amplifier for a radio transmitter, such as the transmitter in a handset used in cellular communications. In such a case, the slight variation in output voltage at the switching frequency will be mixed with the intended output signal of the radio transmitter to create undesired “spurious” output signals, commonly known as spurs, at frequencies offset from the carrier frequency by the switching frequency (as well as its harmonics), as shown in FIG. 6. Spurious output signals may be subject to stringent requirements. For example, a cellular handset operating in the United States may transmit on a channel in the uplink band, from 824 to 849 MHz, and simultaneously receive a signal from a basestation at the corresponding paired channel 45 MHz higher, in the 869-894 MHz downlink band. These bands are shown graphically in FIG. 7. For a transmit frequency of 825 MHz and switching frequency of 100 MHz, the first high-side spur will occur at 925 MHz, outside of the intended receive band. However, if the operating frequency is allowed to fall to, for example, 65 MHz, the spur will lie within the downlink band, where it may interfere with neighboring handsets, and is thus subject to strict limits on effective radiated power. If the operating frequency is allowed to fall further to 45 MHz, the spur will lie within the paired receive channel to which the handset is attempting to listen; in this case, spurs must be comparable to thermal noise levels to avoid impacting receiver performance. Similar constraints exist for transmission in other bands.
It is therefore desirable to be able to operate high frequency switched-mode DC-DC converters at a fixed switching frequency, even at high ratios of output voltage to input voltage.